1. Field
Embodiments of the present disclosure relate to a data transmitter, and more particularly, to a data transmitter capable of adjusting an output impedance.
2. Description of the Related Art
FIG. 1 is a block diagram illustrating a conventional N-channel data transmitter 1.
The data transmitter 1 includes a plurality of transmitter circuits 10 and an impedance control circuit 30. Each of the plurality of transmitter circuits 10 transmits a signal to a corresponding receiver circuit 20 of a data receiver 2 through a corresponding channel 3.
When a data transmission rate is high, an impedance matching operation is desirable to reduce reflection noise. For example, when the single-ended characteristic impedance of one channel 3 is set to Z, a resistor R having a magnitude of 2Z is connected to an input terminal of the receiver 20 in a transmitter/receiver system operating in a differential mode. In the case of the transmitter 10, the value of differential output impedance is designed at 2Z. However, the output impedance of the transmitter 10 may differ from the designed output impedance, depending on factors such as process, temperature, and voltage. In order to achieve impedance matching for each of the transmitter circuits, the conventional data transmitter 1 further includes the impedance control circuit 30.
FIG. 2 is a circuit diagram illustrating the transmitter 10 of FIG. 1.
The transmitter 10 of FIG. 2 is a voltage mode transmitter to transmit signals in a differential manner.
The transmitter 10 includes driving transistors M1 and M6 and switching transistors M2 to M5. The driving transistor M1 and M6 provide a driving current, and the switching transistors M2 to M5 generate output signals VOP and VON to a channel according to input signals VIP and VIN which are differential signals.
In FIG. 2, the driving transistors and the switching transistors are NMOS transistors. In the transmitter 10, the transistors M2 and M5 are controlled according to a first data signal VIP, and the transistors M3 and M4 are controlled according to a second data signal VIN having the opposite logic level of the first data signal VIP.
The output impedance of the transmitter 10 includes a pull-up impedance and pull-down impedance. The pull-up impedance is determined as the sum of impedances of the transistors M1 and M2 or transistors M1 and M3, and the pull-down impedance is determined as the sum of impedances of the transistors M4 and M6 or transistors M5 and M6.
The impedance of each transistor is determined by a gate bias voltage and the physical size of the transistor. Thus, even after the physical size of the transistor is determined, the magnitudes of the pull-up impedance and pull-down impedance may be adjusted using bias signals VUP and VDN provided to the driving transistors M1 and M6.
The conventional data transmitter further includes the impedance control circuit 30 configured to generate the bias signals VUP and VDN for controlling the output impedance of the transmitter 10.
FIG. 3 is a circuit diagram of the impedance control unit 30.
The impedance control circuit 30 includes a replica transmitter 31, a comparator 32, and a reference voltage generator 33. The replica transmitter 31 has an output terminal coupled to a replica resistor 34.
The replica transmitter 31 is a circuit configured by replicating the transmitter 10, and includes replica driving transistors M7 and M12 respectively corresponding to the driving transistors M1 and M6 of the transmitter 10 and replica switching transistors M8 to M11 respectively corresponding to the switching transistors M3 to M6.
As data signals VIP and VIN of the replica transmitter 31, constantly fixed voltages are provided. When a supply voltage VDD and a ground voltage VSS are provided as data signals as illustrated in FIG. 3, a first output signal VOP has a voltage corresponding to logic 1, and a second output signal VON has a voltage corresponding to logic 0.
The voltages of the first output signal VOP and the second output signal VON are determined through voltage division according to a pull-up impedance of the replica transmitter 31, a resistance of a replica resistor R coupled to the outside, and a pull-down impedance of the replica transmitter 31.
Thus, when the driving voltages VUP and VDN are adjusted so that the voltage of the output terminal VOP becomes 3VDD/4 and the voltage of the output terminal VON becomes VDD/4, the pull-up impedance and pull-down impedance of the replica transmitter 31 each have a magnitude of R/2 (=Z).
The reference voltage generator 33 generates a first reference voltage REFP having a magnitude of 3VDD/4 and a second reference voltage REFN having a magnitude of VDD/4, using four resistors R1.
The comparator 32 compares the reference voltages REFP and REFN to the voltages of the output signals VOP and VON, and outputs bias signals VUP and VDN. The comparator 32 is part of a negative feedback loop that adjusts the bias signals VUP and VDN so as to equalize the reference voltages to the voltages of the output signals.
The impedance control circuit 30 provides the generated bias signals VUP and VDN to the transmitter circuit 10. Since the transmitter 10 and the replica transmitter 31 have the same structure, the output impedance of the transmitter circuit 10 is equal to the channel impedance (R=2Z).
In the conventional data transmitter, the bias signals VUP and VDN generated through one impedance control circuit 30 are provided to the transmitter circuits 10 of each channel. However, due to process and temperature variations, one or more of the transmitter circuits 10 may have output impedance values different from that of the replica transmitter. As a result, impedance matching may not be accurately performed for these transmitter circuits 10 corresponding to different channels. Accordingly, high-speed data transmission may not be performed.
Furthermore, the impedance control circuit 30 may use a precisely fabricated replica resistor 34 that is provided outside the conventional data transmitter 1 for the impedance matching operation. However, because the replica resistor 34 has a relatively large size, and a pair of pads must be added to the data transmitter 1 in order to connect the replica resistor 34 to the impedance control circuit 30, the entire area and manufacturing cost of the data transmitter 1 may be increased.